RISC-V at embedded world 2025

To construct an innovation in AI on hardware with minimal resources in the ecosystem we have as well as ambitious
RISC-V standard rapid schedule. We all face very challenging tasks. Chiplet is one of the first solutions which our SoC
partner adopted, and the ESWIN 7702 is the first RISC-V Chiplet AI SoC in the world.
The flexibility in choosing 4-core 7700 or 8-core 7702 is undoubtedly given with a huge save in terms of time and cost in
SoC manufacturing. Moreover, for a product company like us DeepComputing, for the speedy product development,
compatibility between SoC is the key for high end and cost down version of product.

The open architecture of RISC-V is ideal for augmenting with hardware accelerators, like co-processors, processing units, or bus-based peripherals.  Accelerators can significantly improve performance, and reduce power consumption for RISC-V processor based designs. These accelerators often off-load functions that were originally performed in software.  Catapult High-Level Synthesis is an ideal way to migrate software functions into domain specific hardware accelerators.  Learn how Catapult High-Level Synthesis can make your RISC-V platform faster, more efficient, and more competitive.

Modern applications demand increased compute power resulting in exponential increase in design complexity. These complex RISC-V based SoCs can’t rely on traditional way of debugging, requiring an efficient way of debugging & tracing. In this presentation, we will unveil Tessent UltraSight-V, an end-to-end solution consisting of embedded IP and software designed to provide comprehensive, efficient debugging and trace capabilities that integrates with industry standard tool to further empower embedded software engineers in developing high-performance embedded software. The integration of Tessent UltraSight-V on-chip IP modules and host software empowers engineers to efficiently diagnose the root causes of unexpected behaviour and underperformance. Utilizing effective, non-intrusive techniques such as encoded processor trace based on the Efficient Trace (E-trace) standard, logging, high-speed interfaces (USB 2.0) and DMA for fast code uploads, this solution minimizes debugging delays and accelerates your SoC projects, ensuring they meet their market deadlines.

Semidynamics is a key player in the AI inference industry. We will discuss how the new Semidynamics Aliado package can help in the development of the AI inference on the edge

Recent weeks, DeekSeek is hottest topic in AI. The key principle is about vertical optimising training or inferencing as
usual like in conventional computing instead of putting more hardware in parallel.
Now the world first RISC-V 50 TOPS AI-PC is born, the question now lies on what application and how application
developers can use the AI compute to bring true AI experience to the end user.
We are here to call for more applications collaboration with prizes and hardware sponsorship besides some typical
applications with AI integration and optimisation we done and talk about, like
1) VLC, one of the most popular Media Player with 100M downloads in Linux Distros, using optimised models on local AI
compute.
2) vsCode, the most popular Coding Editor using local AI Compute JS API like Web Services
3) Chrome, the monopoly Browser with local AI Compute JS API like TensorflowJS