RISC-V at embedded world 2025

The open architecture of RISC-V is ideal for augmenting with hardware accelerators, like co-processors, processing units, or bus-based peripherals.  Accelerators can significantly improve performance, and reduce power consumption for RISC-V processor based designs. These accelerators often off-load functions that were originally performed in software.  Catapult High-Level Synthesis is an ideal way to migrate software functions into domain specific hardware accelerators.  Learn how Catapult High-Level Synthesis can make your RISC-V platform faster, more efficient, and more competitive.